Delay Block Models
CopyDS_wDelay
File: general_blocks/Delays/CopyDS_wDelay.sim
Description
The model makes a distinct copy of data tokens. Can be
used when copy by reference cannot. Automatically detects
whether the two output ports are actually connected to
anything, and does not make a copy if either outout is
unconnected. If both outputs are unconnected, the
received data structure is consumed.
Tokens sent to out2 are delayed by the specified amount,
or the default if unspecified.
Ports
Input Ports
Output Ports
- out1 Data Type: Complex
- out2 Data Type: Complex
Parameters
- Delay Data Type: REAL (Default = 1.0e-9)
AbsDelay
File: general_blocks/Delays/Abs_Delay.sim
Description
The model delays the propagation of the in data structure for the
specified amount of time. The in data strucuture is placed on the
out after the time specified by the delay input has
passed.
Ports
Input Ports
- in Data Type: TRIGGER
- delay Data Type: REAL
Output Ports
Parameters
FixedProcDelay
File: general_blocks/Delays/Fixed_Proc_Delay.sim
Description
The model is used to request resource use in a processor.
Ports
Input Ports
Output Ports
Parameters
- fixed_delay = 1.0 Data Type: REAL
FixedAbsDelay
File: general_blocks/Delays/Fixed_Abs_Delay.sim
Description
Fixed Absolute Delay. The model delays the propagation of the input data
structure ( in ) by the amount specified by the fixed_delay
parameter. All
data structures undergo the same delay when this model is used.
Ports
Input Ports
Output Ports
Parameters
- fixed_delay = 1.0 Data Type: REAL
Split_wDelay
File: general_blocks/Delays/Split_wDelay.sim
Description
The model puts the input value in on to the two output
ports out1 and out2. The data structure is sent to out1
immediately, and it is sent to out2 after the specified
delay.
Ports
Input Ports
Output Ports
- out1 Data Type: Any
- out2 Data Type: Any
Parameters
- Delay Data Type: REAL (Default = 1.0e-9)